Thesis Sensor Interface Circuits

The readout electronics can be divided into four different functional parts, namely the sensor readout itself, signal post-processing, references, and power management. © 2008 Institute of Electrical and Electronics Engineers (IEEE). By permission.[Publication 8]: Matti Paavola, Mika Kämäräinen, Erkka Laulainen, Mikko Saukoski, Lauri Koskinen, Marko Kosunen, and Kari A. © 2009 Institute of Electrical and Electronics Engineers (IEEE).

Before the focus is shifted to the references and further to power management, different ways to realize the sensor readout are briefly discussed. A micropower interface ASIC for a capacitive 3-axis micro-accelerometer. By permission.[Publication 7]: Matti Paavola, Mika Kämäräinen, Erkka Laulainen, Mikko Saukoski, Lauri Koskinen, Marko Kosunen, and Kari Halonen. A 21.2µA ΔΣ-based interface ASIC for a capacitive 3-axis micro-accelerometer.

The research described in this thesis concentrates on the design of low-power sensor interfaces for capacitive 3-axis micro-accelerometers.

The primary goal throughout the thesis is to optimize power dissipation.

This implementation exhibits greatly reduced chargefeedthrough, and circuit behaviour is in accordance with a modification to the firstorder analysis that includes the effects of chargefeedthrough.

Importantly, no frequency locking and much reduced jitter is observed.In addition, parasitic induced jitter and frequency locking are identified as a second source of error.The three interface circuits are implemented as an integrated circuit using the European Silicon Structures (ES2) ASIC CMOS process, with a modification to permit the inclusion of fullcustom designed, chargefeedthrough compensated switches.This thesis reports an investigation into integrated interface circuits for switched capacitor sensors for application in industrial process control instrumentation networks.Three circuits are presented: an absolute capacitance to voltage converter; a capacitance ratio to frequency ratio converter; and a capacitance ratio to voltage ratio converter.Such oscillators suffer from poor jitter and phase noise performance, the quantities of which also deserve discussion in this thesis. © 2006 Institute of Electrical and Electronics Engineers (IEEE). By permission.[Publication 3]: Matti Paavola, Mika Kämäräinen, Jere Järvinen, Mikko Saukoski, Mika Laiho, and Kari Halonen. A 62µA interface ASIC for a capacitive 3-axis micro-accelerometer. Finally, the regulation of the supply voltage using linear regulators is considered. By permission.[Publication 2]: Matti Paavola, Mikko Saukoski, Mika Laiho, and Kari Halonen. A micropower voltage, current, and temperature reference for a low-power capacitive sensor interface. In: Digest of Technical Papers of the 2007 IEEE International Solid-State Circuits Conference (ISSCC 2007). Of the circuits, the first two are subject to most thorough investigation with the capacitance ratio to frequency ratio converter being of particular interest.This circuit is based upon a switched capacitor, frequency controlled, negative feedback loop which permits implementation with modest quality analogue components, such as are provided with a standardcell ASIC CMOS process.By continuing to use this site, you consent to the use of cookies.We use cookies to offer you a better experience, personalize content, tailor advertising, provide social media features, and better understand the use of our services.

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